From b24e4ccd245861f7537f17c3e01be2cbefb1b29e Mon Sep 17 00:00:00 2001 From: Joseph Richey Date: Fri, 25 Oct 2019 17:15:27 -0700 Subject: Delete vendored code and update CI to Go 1.13 (#158) As the Go community transitions to using the modules ecosystem, we want to only support one way of managing dependencies. So this change moves to only using Go modules for dependency management. This means that our effective minimum Go version increases to Go 1.11. To account for this, we also update: - the documentation - Makefile - CI scripts --- vendor/golang.org/x/sys/cpu/cpu.go | 38 -------------------------------------- 1 file changed, 38 deletions(-) delete mode 100644 vendor/golang.org/x/sys/cpu/cpu.go (limited to 'vendor/golang.org/x/sys/cpu/cpu.go') diff --git a/vendor/golang.org/x/sys/cpu/cpu.go b/vendor/golang.org/x/sys/cpu/cpu.go deleted file mode 100644 index 3d88f86..0000000 --- a/vendor/golang.org/x/sys/cpu/cpu.go +++ /dev/null @@ -1,38 +0,0 @@ -// Copyright 2018 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// Package cpu implements processor feature detection for -// various CPU architectures. -package cpu - -// CacheLinePad is used to pad structs to avoid false sharing. -type CacheLinePad struct{ _ [cacheLineSize]byte } - -// X86 contains the supported CPU features of the -// current X86/AMD64 platform. If the current platform -// is not X86/AMD64 then all feature flags are false. -// -// X86 is padded to avoid false sharing. Further the HasAVX -// and HasAVX2 are only set if the OS supports XMM and YMM -// registers in addition to the CPUID feature bit being set. -var X86 struct { - _ CacheLinePad - HasAES bool // AES hardware implementation (AES NI) - HasADX bool // Multi-precision add-carry instruction extensions - HasAVX bool // Advanced vector extension - HasAVX2 bool // Advanced vector extension 2 - HasBMI1 bool // Bit manipulation instruction set 1 - HasBMI2 bool // Bit manipulation instruction set 2 - HasERMS bool // Enhanced REP for MOVSB and STOSB - HasFMA bool // Fused-multiply-add instructions - HasOSXSAVE bool // OS supports XSAVE/XRESTOR for saving/restoring XMM registers. - HasPCLMULQDQ bool // PCLMULQDQ instruction - most often used for AES-GCM - HasPOPCNT bool // Hamming weight instruction POPCNT. - HasSSE2 bool // Streaming SIMD extension 2 (always available on amd64) - HasSSE3 bool // Streaming SIMD extension 3 - HasSSSE3 bool // Supplemental streaming SIMD extension 3 - HasSSE41 bool // Streaming SIMD extension 4 and 4.1 - HasSSE42 bool // Streaming SIMD extension 4 and 4.2 - _ CacheLinePad -} -- cgit v1.3